The source and drain are interchangeable

Forum: Analog electronics and circuit technology Question about CMOS design





Good morning, I have a question about the Wikipedia article on CMOS. Under Technology https://de.wikipedia.org/wiki/Complementary_metal-oxide-semiconductor#Technik there is the following:> A low voltage of approx. 0 V at the input (E) of the inverter corresponds to> the logical "0". It ensures that only the p-channel component conducts current> and that the supply voltage is therefore connected to output (A). It doesn't make sense to me. As far as I know, neither an NMOS nor a PMOS transistor should switch through at 0V. See characteristic curve on this page: http://www.tf.uni-kiel.de/matwis/amat/mw2_ge/kap_6/backbone/r6_4_3.html Instead, a negative voltage would have to be present so that the PMOS transistor switches. greetings



From the point of view of the P-channel MOSFET you also have a negative voltage, because its source connection is connected to + 5V.


student02 wrote:> Good morning, I have a question about the Wikipedia article about CMOS.> ... makes no sense to me. As far as I know, at 0V neither> an NMOS nor a PMOS transistor should switch through.> Instead, a negative voltage would have to be applied so that the> PMOS transistor switches. The decisive factor is not the voltage with respect to GND at the gate of the MOSFET, but the voltage between Gate and source of the MOSFET is applied. In the CMOS inverter, the source of the p-channel MOSFET is connected to the (positive) supply voltage. And now think again how big the gate-source voltage is when the input of the inverter is on GND.



Axel S. wrote:> What matters is not the voltage with respect to GND at the gate of the MOSFET,> but the voltage between the gate and source of the MOSFET. Ah, that explains a lot. But I don't really understand the circuit yet: In the specific case on the Wikipedia side, the source connection of the p-channel FET (i.e. the upper one) is connected to the drain of the n-channel FET and the output. If I now apply 0V to the input, the n-channel FET (i.e. the lower one) should block, since the gate-source voltage is then 0V. That makes sense, but what potential is there now at the source of the p-channel FET? As far as I can see, the exit. So Ugs = input - output. Now assume that the input was at + 1V before. That would mean that the output switched to ground beforehand, since it is ultimately an inverter. But if I were to apply 0V to the input, the voltage between the source of the p-channel FET and the input would be 0V. Nothing should really happen. Why does it work anyway?



student02 wrote:> Ah, that explains a lot. I don't really understand the circuit> yet: In the specific case on the Wikipedia side, the> source connection of the p-channel FET (i.e. the upper one) is connected to the drain of the> n-channel FET and the output. No, the PMOS source is connected to VDD. The two drain connections of NMOS and PMOS are connected. The source of the NMOS is on GND.

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student02 wrote:> on the Wikipedia page, the> source connection of the p-channel FET (i.e. the upper one) is connected to the drain of the> n-channel FET and the output. No he is not. The drain connections of the two MOSFETs are connected. The source is at Vcc or GND (for p- or n-MOSFET). With an enhancement MOSFET, the channel is symbolized by the three short lines. The line at one end is drain, the other at the other end is source. In the middle part there is an arrow which symbolizes the barrier layer between the channel and the substrate. And as with a diode (and a bipolar transistor), the arrow points from P to N. With a p-channel MOSFET that means away from the channel. The substrate (the other end of the arrow) is connected to either end of the channel. And only through this connection does this end become the source connection of the MOSFET. In the circuit diagram of the CMOS inverter on Wikipedia, the source connection of the p-channel MOSFET points upwards and that of the n-channel MOSFET points downwards.

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Oh thanks. Why do you connect the substrate to the source connection? Doesn't that really matter?


student02 wrote:> Oh, thank you. Why do you connect the substrate to the> source connection? Doesn't that really matter? Discrete MOSFETs only have 3 connections [1] and therefore got to the substrate can be connected to one of the two channel ends. And as already said, the substrate is not connected to the source connection, but the connection connected to the substrate only becomes a source through this connection. Without this connection, the source and drain would be interchangeable. And while we're at it: the "tripod" rule does not apply to the MOSFET in IC. In fact, all (!) N-channel MOSFETs in an IC use the same substrate and the substrate is connected to GND. Likewise, all p-channel MOSFETs use Vcc as a substrate. This is what you must keep in mind when trying to understand the internal circuitry of a CMOS NAND or NOR. For these 4-legged MOSFETs [2] the control variable is the voltage between gate and substrate. [1] there are (were?) Exotic MOSFETs with a separate substrate connection (substrate = English bulk) [2] is strictly for all MOSFET the true control variable the voltage between gate and substrate. For three-legged MOSFETs, gate-source is of course the same as gate-substrate



Axel S. wrote:> [...] In the same way> all p-channel MOSFETs use Vcc as a substrate. [...] This does not apply to analog circuits. Sometimes the N-tub is placed on a different potential. Otherwise, of course, Full ACK.


Addendum: Axel S. wrote:> And because we are already at it: the "tripod"> rule does not apply to the MOSFET in IC. In fact, all (!) N-channel MOSFETs in an IC use the same substrate and the substrate is connected to GND. Likewise,> all p-channel MOSFETs use Vcc as a substrate. You have to keep this in mind when you> try to understand the internal circuitry of a CMOS-NAND or -NOR. Unfortunately, you often find wrong internal circuits for CMOS logic in the network. E.g. the NOR is wrong here: http://www.darc.de/fileadmin/filemounts/referate/ajw/Onlinelehrgang/a14/Bild14-30.GIF (the p-MOSFET at E2 has bulk and source Not connected). The correct circuit for the NOR can be seen here: http://www.netzmafia.de/skripten/digitaltechnik/cmos-nand.gif Most of the time, the exact connections of the substrate connections are no longer explicitly drawn in the circuit diagram, but are drawn MOSFETs with a seemingly unconnected substrate like here: https://upload.wikimedia.org/wikipedia/commons/thumb/6/68/Cmos_or.svg/220px-Cmos_or.svg.png



Axel S. wrote:> Discrete MOSFETs only have 3 connections [1] and therefore the> substrate must be connected to one of the two channel ends.> Without this connection, the source and drain would be interchangeable. What would be so bad about it if the source and drain were interchangeable? The following irritates me: The idea behind the MOS-FET is that 2 PN junctions are switched in opposite directions. As long as the gate voltage Ugs = 0, it doesn't matter how you polarize the voltage Usd - a current will never flow. This is because a PN junction will always block (if you disregard breakthroughs and such). But if I now connect the source and substrate to one another, then I eliminate a PN junction - as if I were connecting a resistor with 0 ohms in parallel to the pn junction between the source and substrate. After that, the original function of the MOS-FET is destroyed - at least in my opinion, because if I put ground to the substrate (i.e. source) in the case of a p-channel MOS-FET and connect the drain with a positive voltage, then the MOS-FET should function like a diode regardless of the voltage Ugs.



Axel S. wrote:> Most of the time, you draw the exact connections of the substrate connections> no longer explicitly in the circuit diagram, but draw the MOSFETs> with an apparently unconnected substrate, as here: Or omit the substrate entirely and save the cumbersome gaps in the channel also another. It doesn't look like it, but it's usually EnhMode. If there are still gaps in the plan, then this stands for DeplMode: https://upload.wikimedia.org/wikipedia/commons/6/61/IGFET_N-Ch_Enh_Labelled_simplified.svghttps://upload.wikimedia. org / wikipedia / commons / c / c4 / IGFET_P-Ch_Enh_Labelled_simplified.svg You shouldn't rely on the knob for the P-channel if this can be deduced from the context.

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student02 wrote:> The following does irritate me: The idea behind the MOS-FET is that> 2 PN junctions are switched in opposite directions. As long as the> gate voltage Ugs = 0, it doesn't matter how you polarize the voltage Usd - a current will never flow. This is because a PN transition will always> block (if you disregard breakthroughs and such). You are currently describing a bipolar transistor. [Whereby it can only block in one direction, otherwise the BC diode conducts] BJTs are usually always strongly asymmetrical, in particular the blocking voltage is strongly asymmetrical (for normal BJTs the BE path backwards only tolerates values ​​of 3-8 V) and the hFE is in forward and inverse mode clear different. BJTs also work completely differently than FETs.

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student02 wrote:> Axel S. wrote: >> Discrete MOSFETs only have 3 connections [1] and therefore the >> substrate must be connected to one of the two channel ends. >>> Without this connection, the source and drain would be interchangeable.> > What would be so bad if the source and drain were interchangeable>? Has anyone spoken of "bad"? The fact is: you have to connect the substrate somewhere - because it is the reference point for the control voltage. And for a MOSFET to function normally, you can easily connect it to either end of the channel. This makes the MOSFET asymmetrical, which is OK in 99% of all applications. The one percent are the cases where the MOSFET is used in a transmission gate (aka analog switch). This CMOS circuit can only be built with integrated (symmetrical) MOSFETs. https://de.wikipedia.org/wiki/Transmission-Gate> The idea behind the MOS-FET is that> 2 PN transitions are switched in opposite directions. Not at all. The pn junctions from the source / drain to the substrate are used for insulation. Normally both of them are blocked. > If I now connect the source and substrate to one another, then> I eliminate a PN junction - as if I were connecting a> resistor with 0 ohms parallel to the pn junction between the source and the> substrate. Correct. And that's not a problem at all. > Then the original function of the MOS-FET is destroyed - at least> in my opinion. Your opinion is wrong. All of the discrete MOSFETs in your devices have this connection. And obviously they work. > Because if, in the case of a p-channel MOS-FET, I put> ground to the substrate (i.e. source) and connect the drain with a> positive voltage, then the MOS-FET should be like a Diode work. Correct. Every discrete MOSFET has this so-called substrate diode. You can even use it in terms of circuitry, e.g. if you use the MOSFET as an active rectifier. Don't you students learn anything these days?



Marian. wrote:> student02 wrote: >> The following does irritate me: The idea behind the MOS-FET is that >> 2 PN junctions are switched in opposite directions. As long as the >> gate voltage Ugs = 0, it doesn't matter how you polarize the voltage Usd - there will >> never flow a current. This is because a PN junction will always block >> (if you disregard breakthroughs and such). >> You are currently describing a bipolar transistor. So I got this idea from this website: http://www.tf.uni-kiel.de/matwis/amat/mw2_ge/kap_6/backbone/r6_4_3.html> Two pn contacts. One is polarized in the forward direction (the one with the> positive USD connection, the other in the reverse direction. This applies to every source> drain polarity - a pn junction is always blocked.> This means that no source-drain current ISD can flow (from leakage currents once> apart). Axel S. wrote:> The fact is: you have to connect the> substrate somewhere - because it is the reference point for the> control voltage. That makes sense for me. Axel S. wrote: >> Then the original function is of the MOS-FET destroyed - at least >> in my opinion. >> Your opinion is wrong. All discrete MOSFETs in your devices have> this connection. And obviously they work. Exactly, I thought so too. But I would like to knowledge, Why these transistors work. It's kind of strange that you first build 2 PN junctions for isolation and then short-circuit one of them.



Hello Axel S. wrote:> This makes the> MOSFET asymmetrical, which is OK in 99% of all applications. Caution at this point, there are also MOSFETs that are built asymmetrically from the start, even if the substrate connection is not connected to the source. With CMOS, they are certainly symmetrical at first and most of the time this is omitted in the simple schematic sketches anyway, but you cannot say that in general. student02 wrote:> If I now connect source and substrate to one another, then> I will eliminate a PN junction. For the enhancement type: The pn junction itself blocks anyway, you have to bias it in the forward direction so that it becomes conductive. Otherwise you still have the diffusion zone that prevents the flow of electricity. That is, on the channel side, the pn junctions of source and drain are in reverse direction, with the substrate hanging on source potential. The isolation also makes sense, otherwise a strong leakage current will always flow. The current ratio of OFF to ON is important. student02 wrote:> But I would like to know> why these transistors work. It is somehow> strange that there are only 2 PN junctions [...] Draw the band diagram from the source to the drain in the semiconductor, directly under the gate, for the off and on states. The trick with the FET is that you raise the potential in the substrate area under the gate through the field effect and thereby make both junctions conductive.



student02 wrote:> Exactly, that's what I thought. But I would like to know> Why these transistors work. It is somehow> strange that you first build 2 PN junctions for isolation and> then short-circuit one of them. Perhaps the idea helps that both the substrate and the channel between drain and source represent an ohmic resistance from the doping (and from the voltage between G-S), while the diode is distributed over the entire length of the channel.
110V D - + - | <- Subst- + 0V
2 8V + - | <- Subst- + 0V
3 6V + - | <- Subst- + 0V
4 4V + - | <- Subst- + 0V
5 2V + - | <- Subst- + 0V
6 0V + - | <- Subst- + 0V
7 | |
8 0V S - + ----------- +



I spoke to my professor about it this week and now I think I got it. I still write it down again for everyone who comes here from google or who are otherwise interested in it. student02 wrote:> Because if, in the case of a p-channel MOS-FET, I apply> ground to the substrate (i.e. source) and connect the drain to a> positive voltage, then regardless of the voltage> Ugs the MOS- FET work like a diode. Yes, that should even work in theory. I haven't tried it yet (no components here), but if you put the gate on source potential, you should at least theoretically be able to use a MOS-FET as a diode. In practice, however, this is completely irrelevant because the PMOSFET is polarized and, according to the definition, the higher potential must be at the source. student02 wrote:> If I now connect source and substrate to one another, then> I eliminate a PN junction - as if I connect a> resistor with 0 ohms parallel to the pn junction between source and> substrate.> Then the original function of the MOS-FET is destroyed - at least> in my opinion. Well, the function would only be destroyed if the transistor were not switched polarized. In a p-channel MOS-FET, the source must be at a higher potential than the drain. The PN junction at the drain then prevents a current from flowing (except for the reverse current afaik). student02 wrote:> It is somehow> strange that you first build 2 PN junctions for isolation and> then short-circuit one of them. The PN junction at the source is nevertheless necessary, because without it no charge carriers can be injected into the channel. If, in the case of an n-channel MOS-FET, the n-doped layer on the source were omitted, the source would no longer be able to easily inject a large number of electrons into the channel. The metallization on the source contact is not sufficient for this, even if, admittedly, there should actually be quite a lot of electrons (-> Schottky contact?). Well, at least that's what I got from my Prof. I just believe it